本研究室の佐藤助教とM2豊嶋くんが高性能・低消費電力マイクロプロセッサに関する国際会議COOL Chips 20で研究成果を発表しました.

  • Masayuki Sato, Zentaro Sakai, Ryusuke Egawa, Hiroaki Kobayashi, “An Adjacent-Line-Merging Writeback Scheme for STT-RAM Last-Level Caches,” In Proceedings of IEEE International Symposium on High-Performance and Low-Power Chips (COOL Chips 20), April, 2017.
  • Takuya Toyoshima, Masayuki Sato, Ryusuke Egawa, Hiroaki Kobayashi, “An Application-adaptive Data Allocation Method for Multi-channel Memory,” In Proceedings of IEEE International Symposium on High-Performance and Low-Power Chips (COOL Chips 20), April, 2017.

Comments are closed