Journals
[1] Hiroaki Kobayashi, Noboru Endo, Tadao
Nakamura, and Yoshiharu Shigei, "Organization
and Evaluation of a General Purpose Pipeline System," Transactions of the
[2] Hiroaki Kobayashi, Noboru Endo, Tadao
Nakamura, and Yoshiharu Shigei, "Performance
Evaluation of a General Purpose Pipeline System," Transactions of the
[3] Hiroaki
Kobayashi, Tadao Nakamura, and Yoshiharu Shigei, "Parallel processing of an object space for
image synthesis using ray tracing," The Visual Computer, Vol.3, No.1,
pp.13-22, Feb. 1987.
[4] Hiroaki Kobayashi, Satoshi Nishimura, Hideyuki Kubota, Tadao Nakamura, and Yoshiharu Shigei,
"Load balancing strategies for a parallel ray-tracing system based on
constant subdivision," The Visual Computer, Vol.4, No.4, pp.197-209, Oct.
1988.
[5] Hideyuki Mori, Nobuyuki Igata,
Hiroaki Kobayashi and Tadao Nakamura,
"Integrated Computer-Aided Mechanical Design System using
MODEL," Transactions of the
Japan Society of Mechanical Engineers (C), Vol.59, No.567, pp.3597-3602, 1993.
[6] Hiroaki Kobayashi, Hideyuki Kubota, Susumu Horiguchi, and Tadao Nakamura,
"Load Balancing based on Load Coherence Between Continuous Images for an
Object-space Parallel Ray-Tracing System," IEICE Transactions on
Information and Systems, Vol.E76-D, No.12, pp.1490-1499, 1993.
[7] Yoshihira Doi, Hiroaki
Kobayashi and Tadao Nakamura, "Adaptive
Subdivision for the Point-Matching Method," Transactions of the Japan Society of
Mechanical Engineers (A), Vol.60, No.570, pp. 543-548, 1994.
[8] Hideyuki Mori, Nobuyuki Igata,
Hiroaki Kobayashi and Tadao Nakamura,
"Mechanical-Design-Oriented Description Language: MODEL," Transactions of the Japan Society
of Mechanical Engineers (C), Vol.60, No.570, pp.715-720, 1994.
Hideyuki Mori, Hiroaki Kobayashi and Tadao
Nakamura, "Mechanical-Design-Oriented Description Language: MODEL,"
Japanese Journal of Advanced Automation Technology, Vol
7, No.1, pp.29-34, 1995.
[9] Ken-ichi Suzuki, Hiroaki
Kobayashi and Tadao Nakamura, "A TLB-Unified
Cache Management Scheme," Transactions of Information Processing Society
of Japan, Vol.35, No.6, pp.1149-1152, 1994.
[10] Masafumi
Takahashi, Nobuyuki Oba, Hiroaki Kobayashi and Tadao
Nakamura, "A Memory Access Buffering Mechanism for a Processor
Cluster," Transactions of the
[11] Masafumi Takahashi, Nobuyuki
Oba, Hiroaki Kobayashi and Tadao Nakamura, "Decoupled
Modified-bit Cache,"
Transactions of the Institute of Electronics, Information and
Communication Engineers, Vol.J79-D-I, No.7, pp.425-436, 1996.
Masafumi
Takahashi, Nobuyuki Oba, Hiroaki Kobayashi and Tadao
Nakamura, " Decoupled Modified-bit Cache, "Transactions of the
Institute of Electronics, Systems
and Computers in Japan, Vol.28, No.6, pp.49-59, 1997.
[12] Hiroaki Kobayashi, Hitoshi Yamauchi, Yuichiro Toh and Tadao Nakamura, "(Mπ)2: A Hierarchical Parallel Processing System for the Multipass Rendering Method," IEICE Transactions on Information and
Systems , Vol.E79-D, No.8, pp.1055-1064, 1996.
[13] Masafumi Takahashi, Nobuyuki
Oba, Hiroaki Kobayashi and Tadao Nakamura, "A
Memory Access Protocol for Interconnection Networks with Message
Losses," Transactions of the
Institute of Electronics, Information and Communication Engineers, Vol.
J79-D-I, No.9, pp.567-571, 1996.
[14] Hiroyuki Kitajima, Mitsuhiro
Nakaizumi, Hong Shen,
Hiroaki Kobayashi and Tadao Nakamura, "Task
Scheduling Strategies and Their Locality Evaluation of Memory References on a
Parallel Graph Reduction System,"
Transactions of Information Processing Society of Japan, Vol.37, No.11,
pp.2020-2029, 1996.
[15] Nobuyuki
Oba, Takeo Nakada, Ken-ichi
Suzuki, Koichiro Miyazaki, Hiroaki Kobayashi and Tadao Nakamura, "A Hardware Cache Evaluation System:
RICE,"
Transactions of the
[16] Hiroyuki Takizawa, Taira
Nakajima, Hiroaki Kobayashi and Tadao Nakamura,
"A Method for Improving Classification Capability of Mutilayer
Perceptrons," Transactions of the
[17] Takehito Sasaki, Takahiro
Komiya, Koji Takano, Nobuyuki Oba, Hiroaki Kobayashi and Tadao
Nakamura, "Time-Division Pseudo Multi-Port Register File with Wave
Pipelining," Transactions of the Institute of Electronics, Information and
Communication Engineers, Vol.J80-D-I, No.3, pp.223-226, 1997.
[18] Hitoshi Yamauchi, Takayuki Maeda, Hiroaki Kobayashi,
and Tadao Nakamura, "The Object-Space Parallel
Processing of the Multipass Rendering Method on the (Mπ)2 with a Distributed Frame Buffer System," IEICE Transactions on Information and
Systems, Vol.E80-D, No.9, pp.909-918, 1997.
[19] Ken-ichi Suzuki, Nobuyuki
Oba, Takeo Nakada, Koichiro
Miyazaki, Hiroaki Kobayashi, and Tadao Nakamura,
"Performance Evaluation of Level-2 Caches by Using RICE," IEICE
Transactions, Vol.J80-D-I, No.10, pp.793-802, 1997.
[20] Ken-ichi Suzuki, Nobuyuki Oba, Norishige
Shimizu, Hiroaki Kobayashi, and Tadao Nakamura,
"Time Stamp Invalidation for TLB-Unified Cache and Its Performance
Evaluation," IEICE Transactions, Vol.J80-D-I, No.12, pp.941-953, 1997.
Ken-ichi Suzuki, Nobuyuki Oba, Norishige Shimizu, Hiroaki Kobayashi, and Tadao Nakamura, "Time Stamp Invalidation for
TLB-Unified Cache and Its
Performance Evaluation," SYSTEMS and COMPUTERS in Japan, SCRIPTA TECHNICA,
Vol.30, No.11, pp.94-106, 1999.
[21] Takuya Nakaike, Takehito Sasaki,
Masayuki Katahira, Hiroaki Kobayashi , and Tadao Nakamura, "A Scheduling Method for
Instruction-Level Parallel Processing of Vector and Scalar Instructions,"
Vol.J81-D-I, No.7, pp.910-920, 1998.
Takuya Nakaike, Takehito Sasaki, Masayuki Katahira, Hiroaki Kobayashi , and Tadao Nakamura, " A Scheduling Method for Instruction Level Parallel Processing of Vector and Scalar Instructions," Systems and Computers in Japan, Vol.30, No.13, pp.23-33, 1999.
[22] Taira Nakajima, Hiroyuki
Takizawa, Hiroaki Kobayashi, and Tadao Nakamura,
"Kohonen Learning with a Mechanism, the Law of
the Jungle, Capable of Dealing with Nonstationary
Probability Distribution Functions,"
IEICE Transactions on Information and Systems, Vol.E81-D, No.6,
pp.584-591, 1998. [23] Hiroyuki
Takizawa, Taira Nakajima, Hiroaki Kobayashi, and Tadao Nakamura, "Acceleration Techniques for the Network
Inversion Algorithm," IEICE Transactions on Information
and Systems, Vol.E82-D, No.2, pp.508-511, 1999.
[24] Takuya Nakaike, Takayuki Abe,
Nobuyuki Oba, Hiroaki Kobayashi, and Tadao Nakamura,
"MULHI Cache: An Instruction Cache Mechanism for VLIW Processors," IPSJ
Transactions, Vol.40, No.5, pp.1996-2007, 1999. [25] Taira Nakajima, Hiroyuki Takizawa, Hiroaki Kobayashi, and Tadao Nakamura, "A Topology Preserving Neural Network
for Nonstationary Distributions," IEICE Trans.
Inf. & Syst., Vol.E82-D, No.7, pp.1131-1135, 1999.
[26] Takayuki Abe, Takuya Nakaike, Hiroaki Kobayashi, and Tadao
Nakamura, "Dynamic Boosting for VLIW Architecture," Transactions of
IEICE, Vol.J83-D-I, No.1, pp.171-183, 2000.
[27] Kentaro
Sano, Hiroyuki Kitajima, Hiroaki Kobayashi, and Tadao Nakamura, "Data-Parallel Volume Rendering with
Adaptive Volume Subdivision," IEICE Trans. Inf. & Syst., Vol.E83-D,
No.1, pp.80-89, 2000.
[28] Hiroyuki Takizawa, Taira
Nakajima, Hiroaki Kobayashi and Tadao Nakamura,
"An Active Learning Algorithm Based on Existing Training Data," IEICE
Trans. Inf. & Syst. Vol.E83-D, No.1, pp.90-99, 2000.
[29] Kentaro
Sano, Hiroaki Kobayashi, and Tadao Nakamura, "A
Pre-attributed Resampling Algorithm for
Controlled-Precision Volume Ray-Casting," IPSJ Journal, Vol.41, No. SIG 5 (HPS 1), pp.113-124, 2000.
[30] Hiroaki Kobayashi, Hitoshi Yamauchi, Takayuki Maeda,
Mayumi Tokunaga, and Tadao Nakamura,
"Object-Space Parallel Processing of the Multi-Pass Rendering Method for
Message-Passing Parallel Processing Systems," The International Journal of
High Performance Computer Graphics, Multimedia and Visualisation,
Vol.1, No.3, pp.1-14, 2001.
[31] Jubei
Tada, Takuya Nakaike, Nobuyuki Oba, Hiroaki
Kobayashi, and Tadao Nakamura, “Design and Evaluation
of the Mulhi Cache,” IEICE Transactions, Vol.
J85-D-I, No.3, pp.274-285, 2002.
[32] Ken-ichi Suzuki, Yasumasa Saida, Kentaro Sano, Nobuyuki Oba, Hiroaki Kobayashi, and Tadao Nakamura, “Real-Time Ray-Tracing with the 3DCGiRAM
Architecture,” IEICE Transactions, Vol.J85-D-II, No.8, pp.1365-1367, 2002
[33] Takeshi Miura, Hiroyuki Takizawa, Kentaro
Sano, Taira Nakajima, Hiroaki Kobayashi, and Tadao Nakamura, “A Vector Quantizer
Preventing Image Degradation by Minimizing Locally-Concentrated Errors Over Macroblocks,” Information Technology Letters, Vol.1,
pp.185-186, 2002
[34] Hiroyuki Takizawa, Takeshi Miura, Hiroaki Kobayashi,
and Tadao Nakamura, “Vector Quantization Codebook
Design Restraining Edge Degradation of Images,” Information Technology Letters,
Vol.2, pp.243-244, 2003
[35] Hiroyuki Takizawa Kentaro
Sano, Taira Nakajima, Hiroaki Kobayashi, and Tadao Nakamura, “Vector Quantization Codebook Design Using
the Law-of-the-Jungle Algorithm,” IEICE Transactions (ED), Vol. E86-D, No.6,
pp.1068-1077, 2003.
[36] Jubei Tada Hugo Kenji
Pereira Harada, Kentaro Sano, Hiroaki Kobayashi and Tadao Nakamura, “An Instruction Cache Mechanism
for Simultaneous Multithreaded VLIW Processors,” The Journal of Asian
Information-Science-Life, Vol.2, No.1, 2003.
[37] Kentaro Sano, Shintaro Momose, Hiroyuki
Takizawa, Hiroaki Kobayashi, and Tadao Nakamura,
“Efficient Parallel Processing of Competitive Learning Algorithms,” Journal of
Parallel Computing, Vol.30, No.12, pp.1361-1383, 2004.
[38] Hiroaki Kobayashi, Isao Kotera, and Hiroyuki Takizawa, “Locality Analysis to
Control Dynamically Way-Adaptable Caches,” ACM Computer Architecture News, Vol.33,
No.3, pp.25-32, 2005.
[39] Hiroyuki Takizawa, and Hiroaki
Kobayashi, “Evaluation of Large-Scale Remote Interactive Visialization
via Super SINET”, Information, Volume 8, No.3, pp.383-389 2005.
[40] Hiroyuki Takizawa, Tatsunobu
Kokubo, Kenryo Kataumi, and Hiroaki Kobayashi, “Performance Evaluation of
the SX-7 System using the HPC Challenge Benchmark,” IPSJ Transactions on Advanced
Computing Systems, Vol. 46, No. SIG 12, pp.37-45, 2005.
[41] An
Efficient Method for Finding Texts in Living Environments Using an Active
Camera, Accepted for publication in IEICE Transactions, Vol.J88-D-II, No.9, pp.2003-2006,
2005.
[42] Takuro Okawa,
Hiroyuki Takizawa, and Hiroaki Kobayashi, “Modeling and Evaluation of a
Resource Discovery Mechanism for Large Scale P2P Systems, Information
Technology Letters, Vol.4, No.4, pp.21-24, 2005．
[43] Yusuke Funaya, Isao Kotera, Hiroyuki Takizawa and Hiroaki Kobayashi, “Thread Scheduling Based on the Thread Characteristics for Multi-Core Processors,” Information Technology Letters, Vol.5, No.5, pp.37-40, 2006.
[44] Takurou Okawa, Hiroyuki takizawa, and Hiroaki Kobayashi, “A Dynamic Logical Link
Management Mechanism for P2P Resource Discovery Systems,” Information
Technology Letters, Vol.5, No.5, pp.363-366, 2006．
[45] Hiroyuki Takizawa and Hiroaki Kobayashi, “Hierarchical
Parallel Processing of Large Scale Data Clustering on a PC Cluster with GPU
Co-processing,” The Journal of Supercomputing, Vol. 36, No.3, pp.219-234, 2006.
[46] Hong Wang, Hiroyuki Takizawa, and Hiroaki Kobayashi,
“A Dependable Peer-to-Peer computing platform,” Future Generation Computer Systems,
Vol.23, No.8, pp.939-955, 2007.
[47] Isao Kotera,
Hiroyuki Takizawa and Hiroaki Kobayashi, “A Power-Aware and Way-Allocatable Shared Cache Mechanism,” Information Technology
Letters, Vol.6, No.6, pp.55-58, 2007.
[48] Kazuhiro Komatsu, Yoshiyuki Kaeriyama,
Ken-ichi Suzuki, Hiroaki Kobayashi, and Tadao Nakamura, “Accelerating Möller
Intersection Algorithm Using Ray Packets,” Information Technology Letters, Vol.6,
No.6, pp.265-268, 2007
[49] Masayuki Sato, Yusuke Funaya, Isao Kotera, Hiroyuki
Takizawa and Hiroaki Kobayashi, “Analysis of hardware resource conflicts for
runtime performance prediction of SMT processors,” Information Technology
Letters, Vol.6, No.6, pp.67-70, 2007.
[50] Hiroyuki Takizawa and Hiroaki Kobayashi, “Partial
distortion entropy maximization for online data clustering,”
Neural Networks, Vol.20, No.7, pp.819-831 2007.
[51] Hiroaki Kobayashi, Hiroyuki
Takizawa, Takuro Okawa, and
Tsutomu Inaba, “An Efficient Control Mechanism for
Self-Organizing Overlay Networks of Large-Scale P2P Systems,” Interdisciplinary
Information Sciences, Vol.13, No.2, pp.227-237, 2007.
[52] Tomoyuki Saoi, Hiroyuki Takizawa, and Hiroaki Kobayashi, “A
Progressive 3-D Meshing Algorithm for Interactive Simulation of Soft Bodies,”
Journal of INFORMATION, Vol.10, No.6, 2007.
[53] Yoshitomo Murata, Tsutomu Inaba,
Hiroyuki Takizawa and Hiroaki Kobayashi, “A Distributed and Cooperative Load
Balancing Method for Large-Scale Computing Environments,” IPSJ(Information Proessing Society Japan) Journal, Vol.49, No.3,
pp.1214-1228, 2008.
[54] Hiroyuki Takizawa, Tatsuya Chida, and Hiroaki Kobayashi, “Evaluating Computational
Performance of Backpropagation Learning on Graphics
Hardware,” To be published in Electronic Notes in Theoretical Computer Science,
2007.
[55] Kazuhiro Komatsu, Yoshiyuki Kaeriyama,
Ken-ichi Suzuki, Hiroyuki Takizawa, and Hiroaki
Kobayashi, “A Fast Ray Frustum-Triangle Intersection Algorithm with Precomputation and Early Termination,” IPSJ(Information Processing
Society Japan) Transactions (in press), 2008
[56] Isao Kotera, Ryusuke Egawa, Hiroyuki Takizawa and Hiroaki Kobayashi, “A Power-Aware Shared Cache Mechanism Based on Locality Assessment of Memory Reference for CMPs,” accepted for publication in the Trransactions on High-Performance Embedded Architectures and Compilers, 2008.