Conferences (Full-Paper Peer-Reviewed)
[1] Tadao Nakamura, Hiroaki
Kobayashi, Jun Miyajima, Noboru Endo, and Yoshiharu Shigei, "A LANGUAGE PROCESSOR OF AN INTELLIGENT LINK
SYSTEM," Proceedings of the
IEEE ICC '84, 84CH2028-9, pp.527-530, 1984.
[2] Hiroaki Kobayashi, Tadao
Nakamura, and Yoshiharu Shigei, "A Strategy for
Mapping Parallel Ray-Tracing into a Hypercube Multiprocessor System," New
Trends in Computer Graphics (Proceedings of CG International '88), pp.160-169,
1988.
[3] Hiroaki Kobayashi, Hideyuki Kubota, Susumu Horiguchi, and Tadao Nakamura,
"Effective Parallel Processing for Synthesizing Continuous
Images," New Advances in
Computer Graphics (Proceedings of CG International '89), pp.343-352, 1989.
[4] Nobuyuki Oba, Hiroaki Kobayashi, and Tadao Nakamura, "An Adaptive Network Routing Method by
Electrical-Circuit Modeling," Proceedings of the IEEE INFOCOM'93,
pp.586-592, 1993.
[5] Hong Shen,
Hiroaki Kobayashi, and Tadao Nakamura,
"Incorporating the Parallel Processing Techniques with the Demand-driven
Model of Functional Programming Languages," Proceedings of the IEEE
International Conference on Computer, Communication and Power Engineering,
pp.146-149, 1993.
[6] Hong Shen,
Hiroaki Kobayashi, and Tadao Nakamura,
"Developing the Lambda Calculus for FL-oriented Parallel Reductions,"
Proceedings of 3RD INTERNATIONAL CONFERENCE FOR YOUNG COMPUTER SCIENTISTS,
pp.6.49-6.50, 1993.
[7] Jinghua Ding, Mieko Shimamura, Hiroaki Kobayashi, and Tadao
Nakamura, "Expression Recognition Using Back-propagation
Networks," Proceedings of 3RD
INTERNATIONAL CONFERENCE FOR YOUNG COMPUTER SCIENTISTS, pp.3.27-3.30, 1993.
[8] Hiroaki Kobayashi and Tadao Nakamura, "A Massively Parallel Processing
Approach to Fast Photo-Realistic Image Synthesis," Proceedings of Computer
Graphics International '93, pp.497-507.
[9] Jinghua Ding, Mieko Shimamura, Hiroaki Kobayashi, and Tadao
Nakamura, "Expression Recognition Using Neural Networks," Proceedings
of World Congress on Neural Networks '93, pp.IV-231-IV-234, 1993.
[10] Emad Rashid, Hiroaki
Kobayashi, and Tadao Nakamura, "Ants Routing: An
Adaptive Packets Flow Control Scheme in Multimedia Communication,"
Proceedings of IEEE 2nd International Conference on Universal Personal
Communications, pp.228-234, 1993.
[11] Emad
Rashid, Hiroaki Kobayashi, and Tadao Nakamura,
"Knowledge Representation for Adaptive Overload Packets Control in
Multimedia Networks," Proceedings of IEEE GLOBECOM'93, pp.1516-1520, 1993.
[12] Jinghua Ding, Mieko Shimamura, Hiroaki Kobayashi, and Tadao
Nakamura, "Neural Network Structures for Expression
Recognition," Proceedings of
the International Joint Conference on Neural Networks '93, pp.1430-1433, 1993.
[13] Nobuyuki Oba, Ken-ichi
Suzuki, Hiroaki Kobayashi, and Tadao Nakamura, "StarCore: A High-Speed ATM Switching System,"
Proceedings of the IEEE GLOBECOM'94, pp. 139-143, 1994.
[14] Dong Wang, Hiroaki Kobayashi, and Tadao
Nakamura, "Breadth-first Parallel Processing of Sequential Prolog
Programs," Proceedings of the Sixth IASTED-ISMM International Conference
on Parallel and Distributed Computing and Systems, pp.86-89, 1994.
[15] Dong Wang, Hiroaki Kobayashi, and Tadao
Nakamura, "A Hierarchical System for Parallel Processing of Prolog
Programs," Proceedings of the Sixth IASTED-ISMM International Conference
on Parallel and Distributed Computing and Systems, pp.90-93, 1994.
[16] Masayuki Katahira, Hong Shen, Hiroak Kobayashi, and Tadao Nakamura, "Jetpipeline : A Hybrid Pipeline Architecture for Instruction - Level
Parallelism," Proceedings of High Performance Computing Conference'94,
pp.317-323, 1994.
[17] Hong Shen,
Hiroyuki Kitajima, Hiroak
Kobayashi, and Tadao Nakamura, "A Hierarchical
Parallel Reduction System for the Functional Language FL," Proceedings of
High Performance Computing Conference'94, pp.270-279, 1994.
[18] Masayuki Katahira, Takehito Sasaki, Hong Shen,
Hiroaki Kobayashi, and Tadao Nakamura, "Software
Pipelining for JetPipeline Architecture," Proceedings of the International
Symposium on Parallel Architectures, Algorithms and Networks, pp. 127-134,
1994.
[19] Hiroaki Kobayashi, Hitoshi Yamauchi, Yuichiro Toh, and Tadao Nakamura, "(Mπ)2: A Hierarchical Parallel Processing System for a Global
Illumination Model," Proceedings of the International Symposium on
Parallel Architectures, Algorithms and Networks, pp. 157-164, 1994.
[20] Hong Shen, Hiroyuki Kitajima,
Hiroak Kobayashi, and Tadao
Nakamura, "Task Scheduling with Locality Consideration for a Clustered
Parallel FL Reduction System," Proceedings of the IEEE International Aizu Symposium on Parallel Algorithms/Architecture
Synthesis, pp. 234-240, 1995.
[21] Masafumi
Takahashi, Nobuyuki Oba, Hiroak Kobayashi, and Tadao Nakamura, "A Memory Access Buffering Mechanism
for a Clustered Multiprocessor System," International Aizu
Symposium on Parallel Algorithm/Architecture Synthesis, 1995.
[22] Dong Wang, Hiroaki Kobayashi, and Tadao
Nakamura, "Design and Performance Measurements of an Execution Model for
the Parallel Processing of Prolog Programs," Proceedings of the IEEE International
Conference on Algorithms and Architectures for Parallel Processing, pp.650-658,
1995.
[23] Masafumi Takahashi, Nobuyuki
Oba, Hiroaki Kobayashi and Tadao Nakamura,
"Decoupled Modified-Bit Cache,"Proceedings
of the 15th IEEE International Phoenix Conference on Computers and
Communications, pp.136-143, 1996.
[24]Hiroaki Kobayashi, Hitoshi Yamauchi, Yu-ichiro Toh and Tadao Nakamura, "A Hierarchical Parallel Processing
System for the Multipass- Rendering Method,"
Proceedings of the 10th IEEE/ACM International Parallel Processing Symposium,
pp.62-67,1996.
[25] Takehito Sasaki, Takuya Nakaike, Koji Takano, Masayjki Katahira, Hiroaki Kobayashi and Tadao
Nakamura, "Memory Hierarchy Design for Jetpipeline:
To Execute Scalar and Vector Instructions in Parallel," Proceedings of the IEEE Second
International Aizu Symposium on Parallel
Algorithms/Architecture Synthesis, pp.66-73, 1997.
[26] Hiroaki Kobayashi, Takayuki Maeda,
Hitoshi Yamauchi, and Tadao Nakamura, "A Cached
Frame Buffer System for Object-Space Parallel Processing Systems,"
Proceedings of CG International ‘97, pp.146-155, 1997.
[27] Koji Takano, Takehito
Sasaki, Nobuyuki Oba, Hiroaki Kobayashi and Tadao
Nakamura, "Multiport Register File Using Wave Pipelining," IEEE/ACM International Workshop on Logic
Synthesis ‘97, 1997.
[28] Kentaro Sano, Hiroyuki Kitajima, Hiroaki Kobayashi and Tadao
Nakamura, "Parallel Processing of the Shear-Warp Factorization with the
Binary-Swap Method on a Distributed-Memory Multiprocessor System," Proceedings of the IEEE 1997 Parallel
Rendering Symposium, pp.87-94, 1997.
[29] Kouji Takano, Takehito Sasaki, Nobuyuki Oba, Hiroaki Kobayashi and Tadao Nakamura, "Automated Design of Wave Pipelined
Multiport Register Files," Proceedings of ASP-DAC’98,pp.197-202, 1998.
[30] Hitoshi Yamauchi, Takayuki Maeda,
Hiroaki Kobayashi, and Tadao Nakamura,
"Performance Evaluation of a Parallel Multi-Pass Rendering Algorithm Based
on the Object-Space Parallel Processing Model," Proceedings of JSPP 98,
pp.175-182, 1998.
[31] Hiroaki Kobayashi, Hitoshi Yamauchi, Takayuki Maeda,
Mayumi Tokunaga, and Tadao Nakamura, "Static
Load Balancing Schemes for the Object-Space Parallel Multi-Pass Rendering
Method on a Distributed-Memory Multiprocessor System," Proceedings of the
2nd Eurographics Workshop on Parallel Rendering,
pp.133-144, 1998.
[32] Hitoshi Yamauchi, Atsusi Maeda, and Hiroaki Kobayashi, "Developing a
Practical Parallel Multi-pass Render in Java and C++ --- Toward a Grande
Application in Java," Proceedings of the ACM 2000 Java Grande Conference,
pp.126-133, 2000.
[33] Ken-ichi Suzuki, Yoshiyuki Kaeriyama, Jun Sugiyama, Yasumasa
Saida, Nobuyuki Oba, Hiroaki Kobayashi, and Tadao Nakamura, "A Design of Caluculation
Units for the Images Synthesis Intelligent Memory 3DCGiRAM, " Proceedings of
JSPP2001, Vol. 2001, No.6, pp.295-302, 2001.
[34] Hiroaki
Kobayashi, Ken-ichi Suzuki, Yoshiyuki Kaeriyama, Yasumasa Saida, Nobuyuki Oba, and Tadao
Nakamura, "3DCGiRAM: An Intelligent Memory Architecture for
Photo-Realistic Image Synthesis," Proceedings of 2001 IEEE International
Conference on Computer Design, pp.462-467, 2001.
[35] Clecio D. Lima, Kentaro Sano, Hiroaki Kobayashi, Tadao
Nakamura and Michael J. Flynn, “A Technology-Scalable Multithreaded
Architecture,” Proceedings of the 13-th Symposium on Computer Architecture and
High-Performance Computing, pp.82-89, 2001
[36] Jubei Tada, Hugo Kenji
Pereira Harada, Kentaro Sano, Hiroaki Kobayashi and Tadao Nakamura, “An Interleaved Multiple-Hit Cache for
Simultaneous Multithreaded VLIW Processors,” Proceedings of the Third
International Conference on Parallel and Distributed Computing, Applications
and Technologies (PDCAT'02), pp.25-32, 2002.
[37] Kentaro Sano, Hiroyuki
Takizawa, Taira Nakajima, Hiroaki Kobayashi and Tadao Nakamura, “Practical Volume Compression based on
Vector Quantization using the Low-of-the-Jungle Algorithm,” Proceedings of tｈe 2nd International Conference on
Visualization, Imaging, and Image Processing, pp.519-526, 2002.
[38] Hiroaki Kobayashi, Ken-ichi
Suzuki, Kentaro Sano and Nobuyuki Oba, “Interactive
Ray-Tracing on the 3DCGiRAM Architecture, “ Proceedings
of ACM/IEEE MICRO-35 4th Workshop
on Media and Streaming Processors, pp.53-59, 2002.
[39] Hiroaki Kobayashi, “High-Performance
Photo-Realistic Graphics on the 3DCGiRAM Architecture,” Proceedings of
International Conference on Optical Communication and Multimedia (ICOCM2002),
pp.114-117, 2002.
[40] Kentaro Sano, Shintaro. Momose, Hiroyuki
Takizawa, Clecio.Donizete. Lima, Hiroaki Kobayashi,
and Tadao Nakamura, “PARALLEL ALGORITHM FOR THE
LAW-OF-THE-JUNGLE LEARNING TO THE FAST DESIGN OF OPTIMAL CODEBOOKS,”
Proceedings of Fourteenth IASTED International Conference on Parallel and
Distributed Computing and Systems (PDCS 2002), pp.582-587,2002.
[41] Hiroyuki Takizawa, Taira
Nakajima, Kentaro Sano, Hiroaki Kobayashi and Tadao Nakamura, “A Comparison Study Of Vector Quantization
Codebook Design Algorithms Based On The Equidistortion
Principle,” Proceedings of IASTED International Conference on Artificial
Intelligence and Applications, pp. 255-261, 2003.
[42] Hiroyuki Takizawa and Hiroaki Kobayashi, “An Effective
Implementation of Vector Quantization Encoder on Commodity Graphics Hardware,”
Proceedings of International Conference on IT and Applications (ICITA), CD-ROM,
2004,
[43] Hiroyuki Takizawa and Hiroaki Kobayashi, “A Fast
Computation Scheme of Partial Distortion Entropy Updating. Accepted for presentation
at International Conference on Information Technology: Coding and Computing
(ITCC) 2004, Vol.1, pp.736-741,
[44] Hiroaki Kobayashi, Isao Kotera, and Hiroyuki Takizawa, “Locality Analysis to
Control Dynamically Way-Adaptable Caches,” Proceedings of ACM PACT04 Workshop
on Memory Performance (MEDEA-2004), pp. 27-34,
[45] Hiroyuki Takizawa, and Hiroaki
Kobayashi, “Evaluation of Large-Scale Remote Interactive Visialization
via Super SINET”, Proceedings of the 3rd International Conference on
Information (INFO2004), pp. 456-459,
[46] Hiroyuki Takizawa and Hiroaki Kobayashi, “Multi-Grain
Parallel Processing of Data Clustering on Programmable Graphics Hardware,”
Lecture Notes in Computer Sciences, Vol.3358, pp.16-27, Springer-Verlag, 2004.
BEST PAPER AWARD at the 2nd international symposium on
Parallel and Distributed Processing and Applications (ISPA’04),
[47] Hiroaki Kobayashi, Hiroyuki Takizawa, Tsutomu Inaba, and Yasuaki Takizawa, “A
Self-Organizing Overlay Network to Exploit the Locality of Interests for
Effective Resource Discovery in P2P Systems,” Proceedings of the 2005
International Symposium on Applications and the Internet (SAINT2005), pp.
246-255, Trent, Italy, 2005.
[48] V.Zhakhovskii, K.Nishihara, Y.Fukuda, S.Shimojo, T.Akiyama, S.Miyanaga, H.Sone, H.Kobayashi, E.Ito, Y.Seo, M.Tamura, and Y.Ueshima, “A New Dynamic Decomposition Method for Parallel
Molecular Dynamics Simulation,” Proceedings of Cluster Computing and Grid 2005,
pp.9-12,
[49] Tomoyuki Saoi,
Hideaki Goto, and Hiroaki Kobayashi, “Text Detection
in Color Scene Images based on Unsupervised Clustering of Multi-channel Wavelet
Features,” Proceedings of International Conference on Document Analysis and
Recognition (ICDAR), Korea, Volume II, pp.690-694, 2005.
[50] Kosuke
Ikeda, Hiroyuki Takizawa, and Hiroaki Kobayashi, “An Incremental Photon-Mapping
Algorithm for Fast Walk-Through Animations,” Proceedings of International
Conference on Computer Graphics and Imaging, pp. 1-7, 2005.
[51] Wang Hong, Hiroaki Takizawa and
Hiroaki Kobayashi, “A Workflow Management Mechanism for Peer-to-Peer Computing
Platforms,” Proceedings of International Symposium on Parallel and Distributed
Processing and Applications (Lecture Note in Computer Science, Vol. 3758),
pp.827-832, 2005.
[52] Tsutomu Inaba, Takuro Okawa, Yoshitomo Murata,
Hiroyuki Takizawa, and Hiroaki Kobayashi, “Design and Implementation of an
Efficient Search Mechanism based on the Hybrid P2P model for Ubiquitous
Computing Systems,” Proceedings of the 2006 International Symposium on
Applications and the Internet (SAINT2006), pp. 45-53, January 2006.
[53] Yoshitomo Murata, Tsutomu Inaba,
Hiroyuki Takizawa, and Hiroaki Kobayashi, “A Distributed and Cooperative Load
Balancing Mechanism for Large-scale P2P Systems,” Proceedings of the 2006
International Symposium on Applications and the Internet (SAINT2006), pp.
126-129, January 2006.
[54] Akihiko Musa, Hiroyuki Takizawa, Koki Okabe, Takashi
Soga, and Hiroaki Kobayashi, “Implications of Memory Performance for Higly Efficient Supercomputing of Scientific Applications, ” Proceedings of International Symposium on Parallel and
Distributed Processing and Application (ISPA06), pp. 845-858, 2006
[55] Hong Wang, Hiroyuki Takizawa, and
Hiroaki Kobayashi, “Performance Evaluation of K-Means Clustering on the Cell
Processor,” Proceedings of High Performance Computing Symposium 2007, Vol.2007,
No.1, pp.161-168, 2007.
[56] Yoshiyuki Kaeriyama, Daichi Zaitsu, Ken-ichi Suzuki, Hiroaki Kobayashi, and Nobuyuki Oba,
“Multi-Core Data Streaming Architecture for Ray Tracing,” Proceedings of
International Conference on Computer Design, pp.171-178, 2007.
[57] Akihiko Musa, Yoshiei Sato, Ryusuke Egawa, Hiroyuki Takizawa,
Koki Okabe, and Hiroaki Kobayashi, “An On-Chip Cache Design for Vector Processors,”
Proceedings of the MEDEA workshop (PACT 07), pp.17-24, 2007.
[58] Isao Kotera, Ryusuke Egawa, Hiroyuki Takizawa,
and Hiroaki Kobayashi, “A Power-Aware Shared Cache Mechanism Based on Locality
Assessment of Memory Reference for CMPs,” Proceedings
of the MEDEA workshop (PACT 07), pp.121-128, 2007.
[59] Komatasu, Yoshiyuki Kaeriyama, Kenichi Suzuki, Hiroyuki Takizawa, and Hiroaki
Kobayashi, “An Efficient Intersection Algorithm Design of Ray Tracing for
Many-Core Graphics Processors,” Proceedings of the International Conference on
Computer Graphics and Imaging (CGIM 2008), pp.165-171, 2008.
[60] Masahide Tamura, Hiroyuki Takizawa, and Hiroaki
Kobayashi, “A PARALLEL IMAGE GENERATION ALGORITHM BASED ON PHOTON MAPPING,”
Proceedings of the International Conference on Computer Graphics and Imaging
(CGIM 2008), pp.145-151, 2008.
[61] Hong Wang, Hiroyuki Takizawa and
Hiroaki Kobayashi, “A Performance Study of Secure Data Mining on the Cell
Processor,” Accepted for the presentation at STPG2008.
[62] Yoshitomo Murata, Tsutomu Inaba,
Hiroyuki Takizawa, and Hiroaki Kobayashi, “Implementation an Evaluation of a
Distributed and Cooperative Load-Balancing Mechanism for Dependable Volunteer
Computing,” Accepted for the presentation at Dependable Systems and Networks
2008.
[63] Tsutomu Inaba, Yoshitomo
Murata, Hiroyuki Takizawa, and Hiroaki Kobayashi,
“Consideration of Resource Access History for Optimizing
Overlay Networks in P2P-based Resource Discovery,” to appear in the Proceedings
of SAINT2008 Middleware Workshop, (2008-July).
[64] Ling Xu, Hirouyki Takizawa, and Hiroaki Kobayashi, “A Reliability Model for Result Checking in Volunteer Computing,” to appear in the Proceedings of DAS-P2P 2008 Workshop, (2008-July).